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Ahmed Abou-Auf

  • Position: Professor, Electronics and Communications Engineering
  • Department: Department of Electronics and Communications Engineering
  • Email: [email protected]
Brief Biography

Ahmed Abou-Auf is professor of electronics and communications engineering at The American University in Cairo. 

Abou-Auf joined The American University in Cairo in September 2006. He was the chair of the electronics and communications engineering department from 2008 to 2012, he was assistant professor at King Fahd University for Petroleum and Minerals, Hail, Kingdom of Saudi Arabia. He worked for Harry Diamond Laboratories, Adelphi in Maryland, United States from 1989 to 2001. Since 2001, he has been working as a consultant in the area of FPGA and ASIC design for signal processing systems. He recently consulted with Intel, Microsoft, Lockheed Martin, Cisco Systems, Mercury Computers, Magnolia Broadband and Memec Design Services. From 2001 to 2006 he worked as a consultant for FPGA based signal-processing systems. He has a number of publications in both areas.

Research Interest

His research interest is in total-dose testing of VLSI devices as well as developing methodologies for identifying worst-case test vectors. It also includes 3D imaging systems for laser-radar (ladar) sensors. 

  • Abou-Auf, A.A.;  Abdel-Aziz, M.M.; Elkday, M. A.; Ammar; A. A; “Fault Modeling and Worst-Case Test Vector Generation for Flash-Based FPGA’s Exposed to Total Dose,” accepted for publication in IEEE Transactions on Nuclear Science, June 2017.
  • Abou-Auf, A.A.;  Abdel-Aziz, M.M.; Elkday, M. A.; Ammar; A. A.“Worst-Case Test Vectors of FPGAs Exposed to Total Dose,” Proceedings of the Conference on Radiation Effects on Components and Systems, Bremen, Germany, Sept. 2016.
  • Abou-Auf, A.A.; Abdel-Aziz, H.A.; Abdel-Aziz, M.M.; The Nuclear and Space Radiation Effects conference, Paris, France, July 2014.
  • Abou-Auf, A.A.; Abdel-Aziz, H.A.; Abdel-Aziz, M.M.; Wassal, A.G., Talkhan, I. E. “Fault Modeling and Worst-Case Test Vectors for Delay Failures Induced by Total Dose in ASICs,” IEEE Transactions on Nuclear Science, Volume: 59, Issue: 6, Dec. 2012.
  • Abou-Auf, A.A.; Abdel-Aziz, H.A.; Abdel-Aziz, M.M.; Wassal, A.G., “Fault Modeling and Worst-Case Test Vectors of Sequential ASICs Exposed to Total Dose,” IEEE Transactions on Nuclear Science, Volume: 59, Issue: 3, pp. 829 – 837, June 2012.
  • Abou-Auf, A.A.; Abdel-Aziz, H.A.; Abdel-Aziz, M.M.; Wassal, A.G., “Worst-Case Test Vectors of Sequential ASICs Exposed to Total Dose,” Proceedings of the Conference on Radiation Effects on Components and Systems, Sevilla, Spain, September 19 – 23, 2011.
  • Abou-Auf, Ahmed, Hamzah A. Abdel-Aziz, and Amr G. Wassal, “Worst-Case Test Vectors for Logic Faults Induced by Total Dose in ASICs Using CMOS Processes Exhibiting Field-Oxide Leakage,” IEEE Transactions on Nuclear Science, Volume: 58, Issue: 3, pp. 1047 – 1052, June 2011.
  • H. A. Abdel-Aziz, M. M. Abdel-Aziz, A. G. Wassal, and A. A. Abou-Auf, “Worst-Case Test Vectors Generation using Genetic Algorithms for the Detection of Total-Dose Induced Leakage Current Failures,” 2010 5th International Design and Test Workshop (IDT), Dec. 14 – 16, Abu Dhabi.
  • Abou-Auf, A.A.; Abdel-Aziz, H.A.; Abdel-Aziz, M.M.; Wassal, A.G.; Abdul-Rahman, T.A., “Fault Modeling and Worst-Case Test Vectors for Leakage Current Failures Induced by Total Dose in ASICs,” IEEE Transactions on Nuclear Science, Volume: 57, Issue: 6, pp. 3438 – 3442, December 2010.
  • Abou-Auf, Ahmed, Hamzah A. Abdel-Aziz, and Mostafa M. Abdel-Aziz, “Fault Modeling and Worst-Case Test Vectors for Logic Failure Induced by Total-Dose in Combinational Circuits of Cell-Based ASICs,” Vol. NS- 57, No. 4, pp. 1978 - 1985‎‏,‏ IEEE Trans. Nucl. Sci., August, 2010.
  • Abou-Auf, Ahmed, “Total-Dose Worst-Case Test Vectors for Leakage Current Failure Induced in Sequential Circuits of Cell-Based ASICs,” IEEE Trans. Nucl. Sci., NS-56, No. 4, pp. 2189 - 2197, 2009.
  • Stann, Barry L.; Abou-Auf, Ahmed; Aliberti, Keith; Dammann, John; Giza, Mark; Dang, Gerard; Ovrebo, Greg; Redman, Brian; Ruff, William; Simon, Debbie, “Research progress on a focal plane array ladar system using chirped amplitude modulation,” Source: Proceedings of SPIE - The International Society for Optical Engineering, v 5086, 2003, p 47-57
  • Stann, Barry L.; Abou-Auf, Ahmed; Aliberti, Keith; Giza, Mark M.; Ovrebo, Greg; Ruff, William C.; Simon, Deborah R.; Stead, Michael R. “Research progress on a focal plane array ladar system using a laser diode transmitter and FM/cw radar principles,” SPIE Laser Radar Technology and Applications VII Conference, 3-4 April 2002, Orlando, Volume 4723, pages 19-30.
  • Stann, Barry L.; Abou-Auf, Ahmed; Frankel, Scott; Giza, Mark; Potter, William; Ruff, William C.; Shen, Paul H.; Simon, Deborah R.; Stead, Michael R.; Sztankay, Zoltan G.; Lester, Luke F. “Research progress on scannerless ladar systems using a laser diode transmitter and FM/cw radar principles,” Proceedings of SPIE Volume: 4377, 9/2001.
  • Stann, Barry L.; Abou-Auf, Ahmed; Ruff, William C.; Robinson, Dale; Liss, Brian; Potter, William; Sarama, Scott D.; Giza, Mark; Simon, Deborah R.; Frankel, Scott; Sztankay, Zoltan G., “Line imaging ladar using a laser-diode transmitter and FM/cw radar principles for submunition applications,” Proceedings of SPIE Volume: 4035   9/2000.
  • Ahmed A. Abou-Auf, David F. Barbe, Mohamed M. Rushdi “Worst-Case Test Vectors for Functional Failure Induced by Total Dose in CMOS Microcircuits with Transmission Gates,” IEEE Trans. Nucl. Sci, Dec. 1997.
  • Ahmed Abou-Auf “Gate-Level Modeling for Leakage Current Failure Induced by Total Dose for the Generation of Worst-Case Test Vectors,” IEEE Trans. Nucl. Sci, Dec. 1996.
  • A. A. Abou-Auf, D. F. Barbe, and H. A. Eisen, "A Methodology for the Identification of Worst-Case Test Vectors for Logical Faults Induced in CMOS Circuits by Total Dose," IEEE Trans. Nucl. Sci., NS-41, No. 6, pp. 2585-2592, 1994
  • Second-place winner, “Arab Universities Technology Business Plan Competition,”, co-sponsored by the Arab Science and Technology Foundation (ASTF) and Intel Corporation, Sharja, UAE, Oct., 1 – 2, 2006
  • Fourth-place winner, “First Arab Science and Technology Business Plan Competition,” Sponsored by Arab Science and Technology Foundation, Kuwait, Kuwait, April, 2006.
  • Second-place winner of  the “First Technology Development Fund Competition,”  Sponsored by the Ministry of Communications and Information Technology, Cairo, Egypt, June, 2005.
  • Member of the technical review panel for the IEEE Transactions for Nuclear Sciences, December 1997.
  • Member of the technical review panel for NSREC 96, Indian Wells, CA, USA, 15-19 Jul 1996.
  • Member of the technical review panel from the US government for the development of the Rad-hard 1 M SRAM developed by IBM, Manassas, VA, USA, 1993.
  • Member of the technical review panel from the US government for the development of the Rad-hard 256 SRAM developed by IBM, Manassas, VA, 1992.
  • Member of the panel from the US government for the technology review of the Gamma Ray Imaging System (GRIS) developed by Lawrence Livermore National Lab, Los Angeles, CA, USA, 1991.
  • ECNG 219L/2109L: Circuit Analysis Lab
  • ECNG 316/3106: Electronics II: Analog Circuits
  • ECNG 319L/3109L - Electronics Lab
  • ECNG 414/4104 - High Level Digital ASIC Design Using CAD
  • ECNG 510/5210 - Advanced Solid-State Devices
  • ECNG 594/5930 - Advanced Topics in Electronics and Communications Engineering (3 cr.): Advanced ASIC/FPGA Design